1. Field of the Invention
The present invention relates in general to the field of information handling clocking, and more particularly to a system and method for clock domain detection and behavior between information handling system devices.
2. Description of the Related Art
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
Information handling system performance has steadily improved as components used to build information handling systems have improved their ability to process information. In order to take full advantage of this improved component processing capabilities, information handling systems have incorporated buses that communicate information at greater rates typically involving increased bus clock speeds. One difficulty with the more powerful components and improved bus speeds is that information handling systems tend to generate greater amounts of incidental electromagnetic energy. Government regulatory agencies, such as the Federal Communications Commission (FCC), enforce limits on the amount of electromagnetic interference (EMI) that information handling systems are allowed to emit. To meet these EMI limitations, information handling systems are typically designed to have shielding that blocks emission of electromagnetic energy. In addition, component and bus configurations are selected based on their electromagnetic characteristics so that a manufactured information handling system meets desired EMI restrictions. As an example, spread spectrum signaling is often uses to communicate between components to lower the EMI signature of the components.
One difficulty with spread spectrum signaling is that it generally requires a common-clock environment for the interfaced system components. For example, PCI-Express provides gigabit data communication with spread spectrum signaling. This method of clocking has limitations imposed by differential jitter characteristics. The phase of the spread spectrum induced clock modulation changes relative to the distance from a source clock generator and the phase delay between two target components that are communicating information. If target components are significantly delayed from each other, then the phase difference creates jitter between the two components such that the components may not be able to communicate reliably. One technique for counteracting jitter effects in long-distance links, such as Ethernet and Fibre Channel, uses precision local clock sources for each end of a bus so that the clocks are never too far out of synch and clock induced jitter is kept to a minimum. Other techniques include the use of auxiliary signals, GPIOs or 12C buses to define clock domains for multi-configurable systems. USB components use a bias in which a downstream component drives one of a differential pair of data lines high to indicate data speed capability. Information handling system manufacturers often face difficulty in coordinating clock domain management for different types of components.